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  emi/emc-compliant, 15 kv, esd-protected rs-232 line drivers/receivers adm202e/adm1181a rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent ri ghts of analog devices. trademarks and registered trademarks are the prop erty of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.326.8703 ? 2005 analog devices, inc. all rights reserved. features complies with 89/336/eec emc directive esd protection to iec1000-4-2 (801.2) 8 kv: contact discharge 15 kv: air-gap discharge 15 kv: human body model eft fast transient/burst immunity (iec1000-4-4) low emi emissions (en55022) 230 kbits/s data rate guaranteed tssop package option upgrade for max202e, 232e, lt1181a applications general-purpose rs-232 data link portable instruments pdas general description the adm202e and adm1181a are robust, high speed, 2-channel rs-232/v.28 interface devices that operate from a single 5 v power supply. both products are suitable for operation in harsh electrical environments and are compliant with the eu directive on emc (89/336/eec). both the level of electromagnetic emissions and immunity are in compliance. em immunity includes esd protection in excess of 15 kv on all i/o lines, fast transient/burst protection (1000-4-4), and radiated immunity (1000-4-3). em emis sions include radiated and conducted emissions as required by information technology equipment en55022, cispr22. the adm202e and adm1181a conform to the eia-232e and ccitt v.28 specifications and operate at data rates up to 230 kbps. four external 0.1 f charge-pump capacitors are used for the voltage doubler/inverter, permitting operation from a single 5 v supply. functional block diagrams * internal 5k ? pull-down resistor on each rs-232 input c1+ c1? c2+ c2? v cc 10v 10v v+ v? +5v to +10v voltage doubler 5v input c3 6.3v +10v to ?10v voltage inverter c4 10v t1 out t1 in c5 t2 out t2 in adm202e r1 out r2 out r1 in r2 in cmos inputs cmos o utputs eia/tia-232 outputs eia/tia-232 inputs * gnd t1 t2 r1 r2 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f 00066-001 figure 1. * internal 5k ? pull-down resistor on each rs-232 input c1+ c1? c2+ c2? v cc 0.1 f 10v 10v v+ v? +5v to +10v voltage doubler 5v input c3 10v +10v to ?10v voltage inverter c4 0.1 f 10v t1 out t1 in c5 0.1 f 10v t2 out t2 in adm1181a r1 out r2 out r1 in r2 in cmos inputs cmos o utputs eia/tia-232 outputs eia/tia-232 inputs * gnd t1 t2 r1 r2 0.1 f 0.1 f 00066-002 figure 2. the adm202e provides a robust pin-compatible upgrade for existing adm202, adm232l, or max202e/max232e sockets. it is available in a 16-lead pdip, a wide soic, a narrow soic, and a space-saving tssop package that is 44% smaller than the soic package. the adm1181a provides a robust pin-compatible upgrade for the ltc1181a, and it is available in a 16-lead pdip package and a wide 16-lead soic package.
adm202e/adm1181a rev. c | page 2 of 16 table of contents specifications..................................................................................... 3 absolute maximum ratings............................................................ 4 esd caution.................................................................................. 4 pin configuration and function descriptions............................. 5 general description ......................................................................... 6 circuit description....................................................................... 6 charge-pump dc-to-dc voltage converter....................... 6 transmitter (driver) section .................................................. 6 receiver section ....................................................................... 6 high baud rate............................................................................. 6 esd/eft transient protection scheme .................................... 7 typical performance characteristics ..............................................8 esd testing (iec1000-4-2) ...................................................... 10 fast transient/burst testing (iec1000-4-4)........................... 11 iec1000-4-3 radiated immunity ............................................ 12 emissions/interference .............................................................. 12 conducted emissions ................................................................ 12 radiated emissions .................................................................... 13 outline dimensions ....................................................................... 14 ordering guide .......................................................................... 15 revision history 2/05rev. b to rev. c. updated format..................................................................universal changed hysteresis level ..................................................universal change to specifications.................................................................. 3 added esd caution ......................................................................... 4 change to receiver section............................................................. 6 updated outline dimensions ....................................................... 14 changes to ordering guide .......................................................... 15 2/01rev. a to rev. b. deletion of one esd rating in absolute maximum ratings............................................. 4 removal of one column in table ii ................................................ 8
adm202e/adm1181a rev. c | page 3 of 16 specifications v cc = 5.0 v 10%, c1 to c4 = 0.1 f. all specifications t min to t max , unless otherwise noted. table 1. parameter min typ max unit test conditions/comments dc characteristics operating voltage range 4.5 5.0 5.5 v v cc power supply current 2.5 6.0 ma no load 13 18 ma r l = 3 k? to gnd logic input logic threshold low, v inl 0.8 v t in input logic threshold high, v inh 2.4 v t in cmos output voltage low, v ol 0.4 v i out = 3.2 ma cmos output voltage high, v oh 3.5 v i out = ?1 ma logic pull-up current +12 25 a t in = 0 v rs-232 receiver eia-232 input voltage range ?30 +30 v eia-232 input threshold low 0.4 1.2 v eia-232 input threshold high 1.6 2.4 v eia-232 input hysteresis 0.65 v eia-232 input resistance 3 5 7 k? t a = 0c to 85c rs-232 transmitter output voltage swing 5.0 9.0 v all transmitter outputs loaded with 3 k? to ground transmitter output resistance 300 ? v cc = 0 v, v out = 2 v rs-232 output short-circuit cu rrent 10 60 ma timing characteristics maximum data rate 230 kbps r l = 3 k? to 7 k?, c l = 50 pf to 1000 pf receiver propagation delay t phl 0.1 1 s t plh 0.3 1 s transmitter propagation delay 1.0 1.5 s r l = 3 k?, c l = 1000 pf transition region slew ra te 3 8 30 v/s r l = 3 k?, c l = 1000 pf measured from +3 v to ?3 v, or ?3 v to +3 v em immunity esd protection (i/o pins) 15 kv human body model 15 kv iec1000-4-2 air discharge 8 kv kv iec1000-4-2 contact discharge eft protection (i/o pins) 2 kv iec1000-4-4 emi immunity 10 v/m iec1000-4-3
adm202e/adm1181a rev. c | page 4 of 16 absolute maximum ratings t a = 25c, unless otherwise noted. table 2. parameter values v cc ?0.3 v to +6 v v+ (v cc ? 0.3 v) to +14 v vC +0.3 v to ?14 v input voltages t in 0.3 v to (v+, +0.3 v) r in 30 v output voltages t out 15 v r out C0.3 v to (v cc + 0.3 v) short-circuit duration t out continuous power dissipation n-16 450 mw (derate 6 mw/c above 50c) ja , thermal impedance 117c/w power dissipation r-16 450 mw (derate 6 mw/c above 50c) ja , thermal impedance 158c/w power dissipation ru-16 500 mw (derate 6 mw/c above 50c) ja , thermal impedance 158c/w operating temperature range industrial (a version) C40c to +85c storage temperature range C65c to +150c lead temperature (soldering, 10 sec) 300c esd rating (mil-std-883b) (i/o pins) 15 kv esd rating (iec1000-4-2 air) (i/o pins) 15 kv esd rating (iec1000-4-2 contact) (i/o pins) 8 kv eft rating (iec1000-4-4) (i/o pins) 2 kv stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although this product features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality.
adm202e/adm1181a rev. c | page 5 of 16 pin configuration and fu nction descriptions 14 13 12 11 16 15 10 9 8 1 2 3 4 7 6 5 top view (not to scale) c1+ r1 in t1 out gnd v cc v+ c1? c2+ t2 in t1 in r1 out c2? v? t2 out r2 in r2 out adm202e adm1181a 00066-003 figure 3. pin configuration table 3. pin function descriptions pin no. mnemonic description 16 v cc power supply input: 5 v 10%. 2 v+ internally generated po sitive supply (+9 v nominal). 6 v? internally generated ne gative supply (?9 v nominal). 15 gnd ground pin. must be connected to 0 v. 1, 3 c1+, c1? external capacitor 1 is connected between these pi ns. a 0.1 f capacitor is recommended, but larger capacitors of up to 47 f can be used. 4, 5 c2+, c2? external capacitor 2 is connected between these pi ns. a 0.1 f capacitor is recommended, but larger capacitors of up to 47 f can be used. 10, 11 t in transmitter (driver) inputs. thes e inputs accept ttl/cmos levels. 7, 14 t out transmitter (driver) outputs. these are rs-232 signal levels (typically 9 v). 8, 13 r in receiver inputs. these inputs accept rs-232 signal levels. an internal 5 k? pull-down resistor to gnd is connected on each input. 9, 12 r out receiver outputs. these ar e cmos output logic levels. * internal 5k ? pull-down resistor on each rs-232 input c1+ c1? c2+ c2? v cc 10v 10v v+ v? +5v to +10v voltage doubler 5v input c3 6.3v +10v to ?10v voltage inverter c4 10v t1 out t1 in c5 t2 out t2 in adm202e r1 out r2 out r1 in r2 in cmos inputs cmos o utputs eia/tia-232 outputs eia/tia-232 inputs * gnd t1 t2 r1 r2 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f 13 1 3 4 5 11 10 12 9 15 8 7 14 6 2 16 00066-004 figure 4. adm202e typical operating circuit * internal 5k ? pull-down resistor on each rs-232 input c1+ c1? c2+ c2? v cc 0.1 f 10v 10v v+ v? +5v to +10v voltage doubler 5v input c3 10v +10v to ?10v voltage inverter c4 0.1 f 10v t1 out t1 in c5 0.1 f 10v t2 out t2 in adm1181a r1 out r2 out r1 in r2 in cmos inputs cmos o utputs eia/tia-232 outputs eia/tia-232 inputs * gnd t1 t2 r1 r2 0.1 f 0.1 f 13 1 3 4 5 11 10 12 9 15 8 7 14 6 2 16 00066-005 figure 5. adm1181a typical operating circuit
adm202e/adm1181a rev. c | page 6 of 16 general description the adm202e/adm1181e are rugged rs-232 line drivers/receivers. step-up voltage converters coupled with level- shifting transmitters and receivers allow rs-232 levels to be developed while operating from a single 5 v supply. features include low power consumption, high transmission rates, and compliance with the eu directive on electromagnetic compatibility. em compatibility includes protection against radiated and conducted interference, including high levels of electrostatic discharge. all inputs and outputs contain protection against electrostatic discharges of up to 15 kv and electrical fast transients of up to 2 kv. this ensures compliance to iec1000-4-2 and iec1000-4-4 requirements. the devices are ideally suited for operation in electrically harsh environments or where rs-232 cables are frequently being plugged/unplugged. they are also immune to high rf field strengths without special shielding precautions. cmos technology is used to minimize the power dissipation, allowing maximum battery life in portable applications. the adm202e/adm1181a serve as a modification, enhancement, and improvement to the adm230Cadm241 family and its derivatives. it is essentially plug-in compatible and do not have materially different applications. circuit description the internal circuitry consists of four main sections: ? a charge-pump voltage converter ? 5 v logic to eia-232 transmitters ? eia-232 to 5 v logic receivers. ? transient protection circuit on all i/o lines charge-pump dc-to-dc voltage converter the charge-pump voltage converter consists of a 200 khz oscillator and a switching matrix. the converter generates a 10 v supply from the input 5 v level. this is done in two stages, using a switched capacitor technique, as illustrated in figure 6 and figure 7. first, the 5 v input supply is doubled to 10 v, using capacitor c1 as the charge storage element. the 10 v level is then inverted to generate ?10 v, using c2 as the storage element. capacitor c3 and capacitor c4 are used to reduce the output ripple. their values are not critical and can be increased if desired. on the adm202e, capacitor c3 is shown connected between v+ and v cc , whereas it is connected between v+ and gnd on the adm1181a. it is acceptable to use either configuration with both the adm202e and adm1181a. if desired, larger capacitors (up to 47 f) can be used for capacitor c1 to capacitor c4. this facilitates direct substitution with older generation charge-pump rs-232 transceivers. s1 s2 c1 s4 s3 c3 v+ = 2v cc v cc v cc gnd internal oscillator note: c3 connects between v+ and gnd on the adm1181a 00066-006 figure 6. charge-pump voltage doubler s1 s2 c2 s4 s3 c4 v? = ?(v+) v+ gnd internal oscillator gnd from voltage doubler 00066-007 figure 7. charge-pump voltage inverter transmitter (driver) section the drivers convert 5 v logic input levels into rs-232 output levels. when driving an rs-232 load with v cc = 5 v, the output voltage swing is typically 9 v. receiver section the receivers are inverting level shifters that accept rs-232 input levels and translate them into 5 v logic output levels. the inputs have internal 5 k? pull-down resistors to ground and are also protected against overvoltages of up to 30 v. unconnected inputs are pulled to 0 v by the internal 5 k? pull-down resistor. therefore, unconnected inputs and those connected to gnd have a logic 1 output level. the receivers have schmitt-trigger inputs with a hysteresis level of 0.65 v. this ensures error-free reception for both noisy inputs and inputs with slow transition times. high baud rate the adm202e/adm1181a feature high slew rates, permitting data transmission at rates well in excess of the eia/rs-232-e specifications. rs-232 voltage levels are maintained at data rates of up to 230 kbps, even under worst case loading conditions. this allows for high speed data links between two terminals and is also suitable for the new generation isdn modem standards, which require data rates of 230 kbps. the slew rate is internally controlled to less than 30 v/s to minimize emi interference.
adm202e/adm1181a rev. c | page 7 of 16 esd/eft transient protection scheme the adm202e/adm1181a use protective clamping structures on all inputs and outputs to clamp the voltage to a safe level and dissipate the energy present in electrostatic (esd) and electrical fast transients (eft) discharges. a simplified schematic of the protection structure is shown in figure 8 and figure 9. each input and output contains two back-to-back high speed clamping diodes. during normal operation with maximum rs-232 signal levels, the diodes have no effect because one or the other is reverse biased depending on the polarity of the signal. however, if the voltage exceeds about 50 v in either direction, reverse breakdown occurs and the voltage is clamped at this level. the diodes are large p-n junctions that are designed to handle instantaneous current surges that exceed several amperes. the transmitter outputs and receiver inputs have a similar protection structure. the receiver inputs can dissipate some of the energy through the internal 5 k? resistor to gnd, as well as through the protection diodes. the protection structure achieves esd protection up to 15 kv and eft protection up to 2 kv on all rs-232 i/o lines. the methods used to test the protection scheme are discussed in the esd testing (iec1000-4-2) and fast transient/burst testing (iec1000-4-4) sections. r in r x d1 d2 receiver input r1 00066-008 figure 8. receiver input protection scheme r x d1 d2 transmitter output t out 00066-009 figure 9. transmitter output protection scheme
adm202e/adm1181a rev. c | page 8 of 16 typical performance characteristics start 30.0mhz stop 200.0mhz limit db v 80 70 60 50 40 30 20 10 0 00066-010 figure 10. emc radiated emissions log frequency (mhz) 80 70 0 0.3 30 0.6 1 60 50 10 40 30 20 db v limit 3610 00066-011 figure 11. emc conducted emissions load capacitance (pf) 9 7 ?9 0 2500 500 t x o/p (v) 1000 1500 2000 1 ?3 ?5 ?7 5 3 ?1 3000 115kbps 230kbps 460kbps 230kbps 115kbps 460kbps 00066-012 figure 12. transmitter output voltage high/low vs. load capacitance @ 115 kbps, 230 kbps, and 460 kbps v cc (v) 15 10 ?15 5.5 t x o/p (v) 4 4.5 5 5 0 ?5 ?10 t x o/p lo t x o/p lo loaded t x o/p hi loaded t x o/p hi 00066-013 figure 13. transmitter output voltage high/low vs. v cc i load (ma) 15 ?15 v+, v? (v) 10 15 20 25 10 ?5 ?10 5 0 30 5 0 00066-014 figure 14. charge pump v+ and v ? vs. current i load (ma) 15 ?15 t x o/p (v) 10 5 0 ?5 ?10 02 46 8101214 t x o/p lo t x o/p hi 00066-015 figure 15. transmitter output voltage low/high vs. load current
adm202e/adm1181a rev. c | page 9 of 16 ch2  ?400mv 2 1 t t ch1 m2.00 s 5.00v 5.00v ch1 00066-016 figure 16. 230 kbps data transmission v cc (v) 0 6.0 4.0 impedance ( ? ) 4.5 5.0 5.5 200 150 100 50 300 250 v+ v? 00066-017 figure 17. charge-pump impedance vs. v cc
adm202e/adm1181a rev. c | page 10 of 16 esd testing (iec1000-4-2) iec1000-4-2 (previously 801-2) specifies compliance testing using two coupling methods, contact discharge and air-gap discharge. contact discharge calls for a direct connection to the unit being tested. air-gap discharge uses a higher test voltage, but does not make direct contact with the unit being tested. with air-gap discharge, the discharge gun is moved toward the unit being tested, developing an arc across the air gap. this method is influenced by humidity, temperature, barometric pressure, distance, and rate of closure of the discharge gun. although less realistic, the contact-discharge method is more repeatable and is gaining preference to the air-gap method. although very little energy is contained within an esd pulse, the extremely fast rise time coupled with high voltages can cause failures in unprotected semiconductors. catastrophic destruction can occur immediately as a result of arcing or heating. even if catastrophic failure does not occur immediately, the device might suffer from parametric degradation, which can result in degraded performance. the cumulative effects of continuous exposure can eventually lead to complete failure. i/o lines are particularly vulnerable to esd damage. simply touching or plugging in an i/o cable can result in a static discharge, which can damage or completely destroy the interface product connected to the i/o port. traditional esd test methods, such as the mil-std-883b method 3015.7, do not fully test a products susceptibility to this type of discharge. this test was intended to test a products susceptibility to esd damage during handling. each pin is tested with respect to all other pins. there are some important differences between the traditional test and the iec test: ? the iec test is much more stringent in terms of discharge energy. the injected peak current is over four times greater. ? the current rise time is significantly faster in the iec test. ? the iec test is carried out while power is applied to the device. it is possible that the esd discharge could induce latch-up in the device being tested. therefore, this test is more representative of a real-world i/o discharge where the equipment is operating normally with power applied. for peace of mind, however, both tests should be performed to ensure maximum protection during both handling and field service. r1 r2 c1 device under test high voltage generator esd test method r2 c1 h. body mil-std883b 1.5k ? 100pf iec1000-4-2 330 ? 150pf 00066-018 figure 18. esd test standards 100 i peak (%) 90 36.8 10 t dl t rl time t 00066-019 figure 19. human body model esd current waveform 100 i peak (%) 90 10 time t 30ns 60ns 0.1 to 1ns 00066-020 figure 20. iec1000-4-2 esd current waveform the adm202e/adm1181e products are tested using both of the previously mentioned test methods. pins are tested with respect to all other pins as per the mil-std-883b specification. in addition, i/o pins are tested as per the iec test specification. the products were tested under the following conditions: ? power-on ? power-off there are four levels of compliance defined by iec1000-4-2. the adm202e/adm1181a products meet the most stringent level of compliance both for contact and for air-gap discharge. this means that the products are able to withstand contact discharges in excess of 8 kv and air-gap discharges in excess of 15 kv.
adm202e/adm1181a rev. c | page 11 of 16 table 4. iec1000-4-2 compliance levels level contact discharge air discharge 1 2 kv 2 kv 2 4 kv 4 kv 3 6 kv 8 kv 4 8 kv 15 kv table 5. adm202e/adm1181a esd test results esd test method i/o pins mil-std-883b 15 kv iec1000-4-2 contact 8 kv air 15 kv fast transient/burst testing (iec1000-4-4) iec1000-4-4 (previously 801-4) covers electrical fast transient (eft)/burst immunity. electrical fast transients occur as a result of arcing contacts in switches and relays. the tests simulate the interference generated when, for example, a power relay disconnects an inductive load. a spark is generated due to the well-known back emf effect. in fact, the spark consists of a burst of sparks as the relay contacts separate. the voltage appearing on the line, therefore, consists of a burst of extremely fast transient impulses. a similar effect occurs when switching on fluorescent lights. the fast transient/burst test defined in iec1000-4-4 simulates this arcing, and its waveform is illustrated in figure 17. it consists of a burst of 2.5 khz to 5 khz transients repeating at 300 ms intervals. it is specified for both power and data lines. 300ms 15ms t v 5ns 0.2/0.4ms 50ns v t 00066-021 figure 21. iec1000-4-4 fast transient waveform a simplified circuit diagram of the actual eft generator is illustrated in figure 22. the transients are coupled onto the signal lines using an eft coupling clamp. the clamp, which is 1 m long, completely surrounds the cable, providing maximum coupling capacitance (50 pf to 200 pf typ) between the clamp and the cable. high energy transients are capacitively coupled to the signal lines. fast rise times (5 ns), as specified by the standard, result in very effective coupling. this test is very strenuous because high voltages are coupled onto the signal lines. the repetitive transients often cause problems where single pulses do not. destructive latch-up can be induced due to the high energy content of the transients. note that this stress is applied while the interface products are powered up and transmitting data. the eft test applies hundreds of pulses with higher energy than esd. worst-case transient current on an i/o line can be as high as 40 a. r c r m c c high voltage source l z s c d 50 ? output 00066-022 figure 22. iec1000-4-4 fast transient generator test results are classified according to the following: ? classification 1: normal performance within specifi- cation limits ? classification 2: temporary degradation or loss of performance that is self-recoverable ? classification 3: temporary degradation or loss of function or performance that requires operator intervention or system reset ? classification 4: degradation or loss of function that is not recoverable due to damage the adm202e/adm1181a meet classification 2 and have been tested under worst-case conditions using unshielded cables. data transmission during the transient condition is corrupted, but can resume immediately following the eft event without user intervention.
adm202e/adm1181a rev. c | page 12 of 16 iec1000-4-3 radiated immunity iec1000-4-3 (previously iec801-3) describes the measure- ment method and defines the levels of immunity to radiated electromagnetic fields. it was originally intended to simulate the electromagnetic fields generated by portable radio transceivers and other devices that generate continuous wave-radiated electromagnetic energy. its scope has since been broadened to include spurious em energy, which can be radiated from fluorescent lights, thyristor drives, inductive loads, and other sources. testing for immunity involves irradiating the device with an em field. there are various methods of achieving this, including use of anechoic chamber, stripline cell, tem cell, and gtem cell. a stripline cell consists of two parallel plates with an electric field developed between them. the device being tested is placed within the cell and exposed to the electric field. there are three severity levels that have field strengths ranging from 1 v to 10 v/m. results are classified in a similar fashion to those for iec1000-4-2. ? classification 1: normal operation ? classification 2: temporary degradation or loss of function that is self-recoverable when the interfering signal is removed ? classification 3: temporary degradation or loss of function that requires operator intervention or system reset when the interfering signal is removed ? classification 4: degradation or loss of function that is not recoverable due to damage the adm202e/adm1181a products easily meet classification 1 at the most stringent (level 3) requirement. in fact, field strengths of up to 30 v/m showed no performance degradation, and error- free data transmission continued even during irradiation. table 6. test severity levels (iec1000-4-3) level field strength v/m 1 1 2 3 3 10 emissions/interference en55 022 and cispr22 define the permitted limits of radiated and conducted interference from information technology (it) equipment. the objective of the standard is to minimize the level of emissions, both conducted and radiated. for ease of measurement and analysis, conducted emissions are assumed to predominate below 30 mhz, and radiated emissions are assumed to predominate above 30 mhz. conducted emissions conducted emissions is a measure of noise conducted onto the mains power supply. switching transients from the charge pump that are 20 v in magnitude and that contain significant energy can lead to conducted emissions. another source of conducted emissions is the overlap in switch-on times in the charge-pump voltage converter. in the voltage doubler shown in figure 23, if s2 is not fully turned off before s4 turns on, a transient current glitch occurs between v cc and gnd that results in conducted emissions. therefore, it is important that the switches in the charge pump guarantee break-be fore-make switching under all conditions to prevent instantaneous short-circuit conditions. the adm202e is designed to minimize the switching transients and ensure break-before-make switching, thereby minimizing conducted emissions. this results in emission levels well below the specified limits. no additional filtering or decoupling, other than the recommended 0.1 f capacitor, is required. conducted emissions are measured by monitoring the mains line. the equipment used consists of a spectrum analyzer and a lisn (line impedance stabilizing network) that essentially presents a fixed impedance at rf. the spectrum analyzer scans for emissions of up to 30 mhz; a plot for the adm202e is shown in figure 25. s1 s2 c1 s4 s3 c3 v+ = 2v cc v cc internal oscillator gnd v cc 00066-023 figure 23. charge-pump voltage doubler ? 2 switching glitches ? 1 00066-024 figure 24. switching glitches
adm202e/adm1181a rev. c | page 13 of 16 log frequency (mhz) 80 70 0 0.3 30 0.6 1 60 50 10 40 30 20 10 db v limit 36 00066-025 figure 25. adm202e conducted emissions radiated emissions radiated emissions are measured at frequencies in excess of 30 mhz. rs-232 outputs are designed for operation at high baud rates, while driving cables can radiate high frequency em energy. the previously described causes of conducted emissions can also cause radiated emissions. fast rs-232 output transitions can radiate interference, especially when lightly loaded and driving unshielded cables. charge-pump devices are also prone to radiating noise due to the high frequency oscillator and the high voltages being switched by the charge pump. the move toward smaller capacitors to conserve board space has resulted in higher frequency oscillators in the charge-pump design, causing higher levels of conducted and radiated emissions. the rs-232 outputs on the adm202e feature a controlled slew rate to minimize the level of radiated emissions, yet they are fast enough to support data rates of up to 230 kbaud. figure 27 shows radiated emissions vs. frequency. the levels of emissions are well within specifications without the need for additional shielding or filtering components. the adm202e was operated at maximum baud rates and configured like a typical rs-232 interface. testing for radiated emissions was carried out in a shielded anechoic chamber. turntable dut radiated noise adjustable antenna to receiver 00066-026 figure 26. radiated emissions test setup start 30.0mhz stop 200.0mhz limit db v 80 70 60 50 40 30 20 10 0 00066-027 figure 27. adm202e radiated emissions vs. frequency
adm202e/adm1181a rev. c | page 14 of 16 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-013aa seating plane 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 2.65 (0.1043) 2.35 (0.0925) 1.27 (0.0500) bsc 16 9 8 1 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 10.50 (0.4134) 10.10 (0.3976) 8 0 0.75 (0.0295) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) 0.33 (0.0130) 0.20 (0.0079) coplanarity 0.10 figure 28. 16-lead standard small outline package [soic] wide body (rw-16) dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-012ac 16 9 8 1 4.00 (0.1575) 3.80 (0.1496) 10.00 (0.3937) 9.80 (0.3858) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2283) seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 8 0 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarity 0.10 45 figure 29. 16-lead standard small outline package [soic] narrow body (r-16) dimensions shown in millimeters and (inches) 16 9 8 1 pin 1 seating plane 8 0 4.50 4.40 4.30 6.40 bsc 5.10 5.00 4.90 0.65 bsc 0.15 0.05 1.20 max 0.20 0.09 0.75 0.60 0.45 0.30 0.19 coplanarity 0.10 compliant to jedec standards mo-153ab figure 30. 16-lead thin shrink small outline package [tssop] (ru-16) dimensions shown in millimeters 16 1 8 9 0.295 (7.49) 0.285 (7.24) 0.275 (6.99) 0.100 (2.54) bsc seating plane 0.015 (0.38) min 0.180 (4.57) max 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.785 (19.94) 0.765 (19.43) 0.745 (18.92) controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design compliant to jedec standards mo-095ac figure 31. 16-lead plastic dual in-line package [pdip] (n-16) dimensions shown in inches and (millimeters)
adm202e/adm1181a rev. c | page 15 of 16 ordering guide model temperature range package description package option adm202ean ?40c to +85c plastic dip n-16 adm202eanz 1 ?40c to +85c plastic dip n-16 adm202earw ?40c to +85c wide soic r-16w adm202earw-reel ?40c to +85c wide soic r-16w adm202earwz 1 ?40c to +85c wide soic r-16w adm202earwz-reel 1 ?40c to +85c wide soic r-16w adm202earn ?40c to +85c narrow soic r-16n adm202earn-reel ?40c to +85c narrow soic r-16n adm202earn-reel7 ?40c to +85c narrow soic r-16n adm202earnz 1 ?40c to +85c narrow soic r-16n adm202earnz-reel 1 ?40c to +85c narrow soic r-16n adm202earnz-reel7 1 ?40c to +85c narrow soic r-16n adm202earu ?40c to +85c tssop ru-16 adm202earu-reel ?40c to +85c tssop ru-16 adm202earu-reel7 ?40c to +85c tssop ru-16 adm202earuz 1 ?40c to +85c tssop ru-16 adm202earuz-reel 1 ?40c to +85c tssop ru-16 adm202earuz-reel7 1 ?40c to +85c tssop ru-16 adm1181aan ?40c to +85c plastic dip n-16 adm1181aarw ?40c to +85c wide soic r-16w adm1181aarw-reel ?40c to +85c wide soic r-16w ADM1181AARWZ 1 ?40c to +85c wide soic r-16w ADM1181AARWZ-reel 1 ?40c to +85c wide soic r-16w 1 z = pb-free part.
adm202e/adm1181a rev. c | page 16 of 16 notes ? 2005 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. c00066-0-2/05(c)


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